Here is an older application note from the former Motorola semiconductor division regarding transmission lines effects of PCB traces. A more thorough source of information is the MECL Design Handbook, drugs
but this is a good reference with both theory and examples. If the rise or fall times of your designs are approaching the round trip (source to farthest load back to source) with loading, hospital
then transmission line effects of PCB traces must be taken into account.
( AN1051.pdf )
The standard response to this question has consistently been to “put a 0.1uF cap near the IC and then a larger cap in the vicinity of several ICs to charge the 0.1uF cap.” To extend this response, adiposity
some IC manufacturers have been including decoupling capacitors in their reference designs in the datasheets. Although this answers the how, it does not answer the why, so, I will try to give an overview of decoupling capacitor selection and placement for both digital and analog circuits. Continue reading