μblog: engineering from the trenches

Here is a short application note (AN-404) from Analog Devices that deals with high performance analog and digital layout on the same printed circuit board.  The specific example deals with AD1845 and CS4231 codecs and demonstrates some ideas for clean power and ground plane separation, among others. The application note provides some handy numbers, such as a “ballpark” estimate inductance of a PCB trace of 1nH/mm. Another helpful hint is that the note helps prioritize the various pins of the codec on page six to optimize noise management.

While on the subject of PCB design, here is a nice tutorial covering various dielectric materials used in printed circuit board fabrication. Its main goal is to give an overview of the various properties of the materials so the designer has a better judgement of which to use for higher performance RF boards and which is most economic for medium-speed digital designs.

( an-404.pdf )

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What to do when you need to mount a ball-grid array (BGA) package on a circuit board without sophisticated equipment? One popular option is to create something called a “reflow oven” which is able to control your circuit boards temperature with respect to time. The idea behind reflow soldering is that we may want to apply a thin layer of solder paste (solder with flux) over the exposed pads on a printed circuit board, then place all of the surface-mount components on that side, and then heat the board so the solder melts and the components become electrically attached. This is pretty much the only method for attaching components whose pads are completely on the underside making them inaccessible to soldering irons. The temperature profile is fairly standardized (here, here and here) and consists of first removing any excess moisture from the packages, then ramping up to the temperature required to melt the solder, then to cool off in a safe manner that prevents component or joint damage. It should be noted that these temperature profiles aim to limit the time components spend at elevated temperatures (>250C) to minimize the risk of damage due to heat.

What I am proposing is something much simpler: lets use a hot  plate to heat the PCB and achieve the same sort of reflow process. The main disadvantage is that the process is much less controlled and the dimensions of the board must be small enough to fit on the hotplate. The primary benefits are its simplicity. I am fortunate enough to have a hotplate which has a thermocouple to the surface and can measure the surface temperature with some degree of proficiency, so an alternate method will be required for other types. Some kind of infra-red measurement method would probably work well.

The idea is that we first apply solder paste to the board, when necessary. In this example, I am mounting a MICROSMD8 package where there is ample solder on the board and the chip to achieve connection. It is often a good idea to put some clean-free flux on the board in any case. Everything is first pre-heated for ten minutes at 50-80C to get rid of some of the moisture. The assembly is then heated to about 230C. At this point, the chips should already be aligned over the target pads. The reason for this temperature is that unlike the oven, the top surface of the PCB is exposed to air and thereby creates a thermal gradient. We need to control the heat on the top surface so that the solder just barely melts. This can be noted when watching the PCB under a microscope or with a magnifying glass as the solder will become very shiny when it melts.  As the solder melts on the chips and PCB, the surface tension will pull the chip into alignment. The whole assembly can then be slowly cooled and tested electrically. When populating larger projects, it is best to put on the larger chips first and then place something to act as a heat-sink on top. I have had success with larger DSP chips where I placed inverted bolts on top to radiate away some of their heat while adjusting other components. Finally, don’t forget that a cold PCB looks the same as a hot one, so be sure to avoid burning yourself.

( an081.pdf ) ( an353.pdf ) ( xapp427.pdf )

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It is now official:

To our valued OrCAD Layout customers:

As demonstrated in the OrCAD® product 16.0 release, Cadence® continues to invest in providing a fully scalable PCB design solution for our customers – one that grows with you as your PCB designs grow in complexity. We’ve all seen the PCB design landscape change dramatically in recent years. In order to help customers meet current market demands and maximize productivity, Cadence continues to leverage the power of its proven Allegro® PCB technology within our OrCAD product line. This allows Cadence to offer customers unique suites and technology bundles that address current and future design challenges.

This letter is intended to communicate some important developments regarding the future of Cadence OrCAD Layout. Cadence has begun the End-of-Life process for Cadence OrCAD Layout technology based products.

Please Note: Cadence OrCAD Capture, OrCAD Capture CIS, and PSpice® technology are all integral parts of Cadence’s long-term product strategy and are not affected by this notice.

Effective July 31, 2007, Cadence will no longer sell the following Cadence OrCAD Layout based technology products:

1. OrCAD Layout (PO1410)
2. OrCAD Layout Plus (PO1420)
3. OrCAD Unison PCB (PO1510)
4. OrCAD Unison Ultra (PO1530)
5. Layout Studio (PS1430)

We acknowledge that transitioning software systems is never easy and is often a juggling act between investing in learning new technologies and meeting current business priorities. EMA is committed to ensuring we do everything possible to help minimize the impact on you, wherever possible. To help ease the transition, Cadence is providing OrCAD Layout customers with multiple paths for migrating to new technology that leverages the power of Allegro PCB Editor. Learn more about the various transition path options by visiting http://www.ema-eda.com/orcadlayout.

The products entering End of Sale will be supported thru March 31, 2009. After that date, these products will no longer be supported for hot-fixes or support calls and will not be shipped on the OrCAD CD set.

If you have any questions, or would like to discuss these changes and how it may impact you, please contact your EMA Account Manager. You may also contact the EMA technical support team at 585-334-6001, Option 5, or by email at techsupport@ema-eda.com.

We remain focused on providing solutions to ensure your ongoing and future success!

Best regards,
Manny Marcano

President and CEO
EMA Design Automation

Many people saw this coming as virtually no new features have been added to Layout in the past four years, only bug fixes. Although Allegro PCB Editor is a little bit more pricey, I think its worth it, especially for high performance designs. Finally, the Layout site gives some instructions on migrating. Layout,… we have had some great times together:

• The great and unavoidable crashes that used to occur when the user would lock the (win32) workstation running Layout
• All the excellent times that Layout would close your design without saving if you hit CTRL-C twice instead of once
• Layout’s inability to recognize artwork that was placed on the Global Layer (0) when creating Gerber files

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About four years ago, when I first started using the Orcad suite, I embarked on an ambitious project to design one of my first EEG recording amplifier and stimulator interface boards. The project was pretty simple: route twelve differential channels from the pre-amp to the EEG amplifier, track the current going out of the stimulator by way of sense resistors and interface with a National Instruments acquisition board. I did the schematic entry correctly, but I neglected to double check the footprints used for the connectors. That is, in the schematic entry, I used a generic 68 pin connector for the NI connector and selected metal can regulators instead of TO-220 and then picked the wrong polarity on all of the d-sub connectors. The result was that the 68 pin connector just didn’t fit and required massive jumpering for even basic functionality, some of the db25 connectors had to go to the back  of the board (not shown) and the power regulators had to be kludged on. The board was not becoming a truly three-dimensional object that had wires coming out from every direction and could only be secured by clamping one edge of it in a vice. Otherwise, it functioned fairly well so it was still used in some experiments. Due to its green color and protruding wires, it became known as the “christmas tree” and be came synonymous with design failure.

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After some help files and some guesswork, I think I have come up with a workable solution to engraving PCBs with EngraveLab. The previous problem was that it did not import the pads properly from a GerbTool generated HPGL file, and it didn’t do the tracks correctly when importing from a GerbTool generated DXF file. The small workaround is to import both files and then lay one on-top of the other, select both, click a single layer so they are both become the same color, and then do a “basic weld” to join the shapes into one. To be specific, export HPGL with outline selected and with a pen that is very small (0.0001″ works fine). Next, import this HPGL file into Engravelab and when it is selected, perform a basic weld to join all of the parts of the tracks together. Finally, import the DXF file and weld that to the tracks. Now a male toolpath can be created which will go around all of the traces and pads. I am still working out good speed and depth settings for 1oz copper plate and how to do the drilling, however, there is a drill toolpath editor in EngraveLab so that looks promising. As usual, more on this later. (previous post)

Another option that I have been looking at is editing the layer in GerbTool by using tools->convert->draw to pad or something like that. This way, you select all of the tracks and convert them to pads, and then when you export the HPGL with the pads-only option selected, the right looking artwork comes out. The trouble is that the toolpath is on the inside of the design instead of outside. Setting the pen size to 1mil or less makes it looked filled in, but then you still have to generate the appropriate toolpath for the contour.

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Some time ago we good an EGX-300 engraver from Roland in the hope of doing small 3D and PCB prototyping. As far as the 3D goes, the Modella tool that comes from Roland is not too useful for any kind of complex 3D design and most people seem to use VisualMill to generate the tool paths from standard 3D files. An example guide is over at instructables. The EngraveLab software that lots of EGX-300 vendors try to push with this device has so far proven to be fairly useless for 3D work and can be considered to be a waste of 1000USD for this application. (It turns out that EngraveLab is useful once you get some details worked out.)
As far PCB milling goes, I have had a hard time finding a commercial package that will take a Gerber file and create a toolpath to send to an engraver without using some messy intermediate step. One guide is available from UMass which relies on PCBMill web utilities by C. Scott Ananian. These are written in JAVA but have some portability issues with the compiler available for OSX (workgroup server). I have email the authors of the UMass webpage and Ananian about commercial packages and have found none so far. I will try to compile PCBMill on a FreeBSD system next and will post the results. If anyone has reasonably priced alternative software suggestions, please let me know!

( pcbmill-098tar.gz )

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While fixing a power problem in an Axis 2100 webcam, I found this curious emblem on an edge of the PCB near the ethernet connector. Who knew Axis PCB designers liked cartoons from the 1940s?

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Here is an older application note from the former Motorola semiconductor division regarding transmission lines effects of PCB traces. A more thorough source of information is the MECL Design Handbook, but this is a good reference with both theory and examples. If the rise or fall times of your designs are approaching the round trip (source to farthest load back to source) with loading, then transmission line effects of PCB traces must be taken into account.

( AN1051.pdf )

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The standard response to this question has consistently been to “put a 0.1uF cap near the IC and then a larger cap in the vicinity of several ICs to charge the 0.1uF cap.” To extend this response, some IC manufacturers have been including decoupling capacitors in their reference designs in the datasheets. Although this answers the how, it does not answer the why, so, I will try to give an overview of decoupling capacitor selection and placement for both digital and analog circuits. (more…)

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