As I promised, here is a outline of the steps I go through to make the weekly IC Friday posts. First, a word of caution:
Handling sulfuric acid REQUIRES specialized training and equipment. Misuse can result in serious injury or death. Furthermore, improper disposal can cause serious illness to others and permanent damage to your workspace. Finally, adequate ventilation/fume extraction is a MUST when heating sulfuric acid.
I have been playing around with some wifi networking lately, mostly with the La Fonera, and finally decided to build a directional wifi antenna. Although the cantenna, however, I don’t really like Pringles chips and wanted to make something more interesting. I decided to try and make a simple Yagi antenna with a magnetic dipole as the driving element.
From a construction standpoint, the Yagi antenna is made by spacing conducting rods along the directionality axis with a driving element near one end. It is assumed that the incoming radiation is a TEM plane wave, so the direction of the electric field component should be parallel to the conducting rod orientation. The magnetic component is then perpendicular to the rods and to the directionality of the antenna. The rods spacing is then configured so that the coupled EM field generates a magnetic field component (and a curling electric field component) along the directionality axis of the antenna which has constructive interference at the driving loop. Proper spacing then determines the antenna’s gain and directionality in the band of interest (2.4-2.5GHz).
As a first step, I decided to reproduce the Yagi design made available by Andrew Hakman who reproduced the dimensions of a commercial antenna. This first implementation will test the basic operation and is still missing fine tuning and optimization. I am pretty happy with the initial results which demonstrate a 10dBi gain, which is pretty nice given that it took roughly half an hour to assemble. I will use a more precise construction technique (EGX-300 to mill the main beam) and will work out the optimal metal rod length to magnetic dipole ratio. The main idea is that the loop length needs to support one of the resonant transmission modes for the given frequency while the rods should be as long as possible to increase gain, but shorter than the length of the loop. If anyone wants more info on Yagi theory of operation, please post a comment and I will try to write up a post about it.
To construct this, I used a 0.5×0.5 inch piece of wood for the main beam, and 0.125 inch zinc rods for the conductors. I cut the rods to match the lengths in the above design and sanded the ends to remove any pointy spots. I measured out the positions for the rods on a piece of tape and used a small drill press to make the holes. I then gently tapped the rods into place and removed the tape. I cut the loop out of a sheet of bronze, mainly because that is what I had around. It is better to use a strip (versus a round wire) here to make the loop more sensitive to magnetic field components along the directionality axis. Finally, I decided to minimize transmission losses and mounted a USB 802.11g adapter directly onto the loop. I hot-glued everything into place and went to a large set of windows to test out the contraption.
To benchmark the devices performance, I compared signal strengths to the internal wifi adapter on my Lenovo T60. The signal strengths for the same APs were comparable between the internal adapter and the intact USB adapter so any improvement that I saw here was likely due to the Yagi. Although it was sometimes challenging to find the right direction to point the Yagi, I noted a substantial increase in signal power when I switched Netstumbler between the internal and external wifi adapters. Over all, I consider this to be a success since I got better performance from the USB adapter by investing a few dollars and a hour of my time. The next version will be forthcoming in the next weeks and will hopefully display even better performance.
I have found a FireFox addon that essentially allows one to highlight the text to be translated, right-click, and see a preview of the translated text. One more click opens a tab with the full Google translation of the text. Thank you, Pau Tomàs, for making my life a little bit easier!
( gTranslate addon )
For what it is worth, the La Fonera is still one of the better deals on basic embedded systems on the internet. I have looked at it before and shelved it for quite some time until I needed it again for a prank (open wifi, http redirection, etc). The available documentation, at the time of writing, is a bit spotty but one can gather enough information to build and test firmware based on the OpenWRT project. This guide will hopefully illustrate the complete process from the very start to actually running the custom firmware.
What to do when you need to mount a ball-grid array (BGA) package on a circuit board without sophisticated equipment? One popular option is to create something called a “reflow oven” which is able to control your circuit boards temperature with respect to time. The idea behind reflow soldering is that we may want to apply a thin layer of solder paste (solder with flux) over the exposed pads on a printed circuit board, then place all of the surface-mount components on that side, and then heat the board so the solder melts and the components become electrically attached. This is pretty much the only method for attaching components whose pads are completely on the underside making them inaccessible to soldering irons. The temperature profile is fairly standardized (here, here and here) and consists of first removing any excess moisture from the packages, then ramping up to the temperature required to melt the solder, then to cool off in a safe manner that prevents component or joint damage. It should be noted that these temperature profiles aim to limit the time components spend at elevated temperatures (>250C) to minimize the risk of damage due to heat.
What I am proposing is something much simpler: lets use a hot plate to heat the PCB and achieve the same sort of reflow process. The main disadvantage is that the process is much less controlled and the dimensions of the board must be small enough to fit on the hotplate. The primary benefits are its simplicity. I am fortunate enough to have a hotplate which has a thermocouple to the surface and can measure the surface temperature with some degree of proficiency, so an alternate method will be required for other types. Some kind of infra-red measurement method would probably work well.
The idea is that we first apply solder paste to the board, when necessary. In this example, I am mounting a MICROSMD8 package where there is ample solder on the board and the chip to achieve connection. It is often a good idea to put some clean-free flux on the board in any case. Everything is first pre-heated for ten minutes at 50-80C to get rid of some of the moisture. The assembly is then heated to about 230C. At this point, the chips should already be aligned over the target pads. The reason for this temperature is that unlike the oven, the top surface of the PCB is exposed to air and thereby creates a thermal gradient. We need to control the heat on the top surface so that the solder just barely melts. This can be noted when watching the PCB under a microscope or with a magnifying glass as the solder will become very shiny when it melts. As the solder melts on the chips and PCB, the surface tension will pull the chip into alignment. The whole assembly can then be slowly cooled and tested electrically. When populating larger projects, it is best to put on the larger chips first and then place something to act as a heat-sink on top. I have had success with larger DSP chips where I placed inverted bolts on top to radiate away some of their heat while adjusting other components. Finally, don’t forget that a cold PCB looks the same as a hot one, so be sure to avoid burning yourself.
( an081.pdf ) ( an353.pdf ) ( xapp427.pdf )
Last week, I wrote an entry where I pointed out some methods to aid with getting your SPICE simulation to converge and made a promise that I would write a guide that would go through all the necessary steps to create a simulation with a non-standard device. Luckily, the fine folks at Texas Instruments have already written such a guide. The guide is designed to work with the Orcad/Cadence suite and guides the user through all the steps, starting with downloading a SPICE model from ti.com to changing the appearance of the schematic symbol to creating a simulation profile and running the simulation. Although this is geared towards Texas Instruments, the ideas are generic enough to apply to practically any vendor’s models.
For me, speed of construction is the ultimate goal for prototyping circuits. This often involves perforated prototyping boards with components and wires flowing everywhere giving an impression of a clump of hair. It got the job done, however, it was increasingly difficult to troubleshoot with each additional kludge and even harder to have somebody else understand the board. Even if they had the schematics. Some time ago I was pointed to an excellent article by K7Q0 describing Manhattan Building Techniques. The style involves taking a copper clad board and gluing smaller pieces of copper clad board to it to mount components on. Techniques are discussed to make this mounts for single point connectors to more complicated dual in-line connectors. The overall result is that the circuit looks much cleaner and is easier to diagnose. A secondary benefit is that the circuit typically includes a ground plane and the possibility of power planes for reduced noise. The chief downside is that the prototype board takes longer to produce, however, this may well be justified.
( manart.pdf )
I decided to upgrade my Razr V3C to a silver Motorola Q by way of Craigslist. After activating the phone initially, I had some problems with making phone calls. I was able to browse the web using EVDO any time, but I was unable to make any outgoing or receive incoming phone calls. On the outgoing calls, I wouln’t even hear ringing. After a some times, I dialled 911 to see what would happen assuming that the phone would be designed make every possible attempt to make that call go through. Surprisingly, I heard a few rings and quickly hung up before connecting with 911. The icon at the top of the phone indicated CDMA (1X) mode and every subsequent outbound call went through without problems. I figured that the issue was with the CDMA/EVDO switching so I did some searches and used the following steps to correct the problem:
- dial ‘##073887*’ and hit the send button
- enter ’000000′ for the security code (don’t forget to hold the shift key to enter ’0′ instead of ‘?’)
- you are now inside the programming menu!
- go to ‘G Test Mode’
- change the status to ‘Enabled’
- hit ‘Back’ then ‘Exit’ and then you can end the call
- dial ‘##*’ and hit the send button
- you are now in the field test mode!
- select ‘B Field Test Menu’
- select ‘E HDR Preference’ and make sure that ‘Automatic’ is selected and hit back
- select ‘F HDR Hybrid’ and make sure that ‘On’ is selected
This will make sure that the phone will switch between EVDO and CDMA depending on the task at hand. Unlike the RAZR, the USB driver for the phone is Microsoft ActiveSync, so that is what needs to be installed on a Windows machine to recharge the device. I will get a few more things posted about this phone after I play with it some more.
It became apparent that the National Institutes of Health have a virtual carreer center that some decent guides to presenting and publishing. Although a lot of the information there geared to publishing in scholarly journals, the lessons can be taken and applied to many fields of technical writing. Furthermore, if you are a U.S.A. resident, this is your tax money at work, so you might as well reap the benefits.
One of my annoyances with the default settings in LabView is that it places all terminals on the front panel as icons in the block diagram view. These icons are large and tend to push stuff around when they are created automatically. Every time I have to re-install LabView, I figure out how to disable this feature only to promptly forget it. This time around I will record the simple fix to save myself time in the future. The setting can be disabled by going into the Tools -> Options screen in either the front panel or block diagram. Block Diagram is then to be selected from the left side and Place front panel terminals as icons must be unchecked from the right side. Now your block diagram is safe from bulky icons, until the next LabView upgrade that is.