μblog: engineering from the trenches

Although Wolfson Microelectronics produces some fine integrated circuits, their application note section is somewhat out of the way and doesn’t like to be linked to directly. This didn’t stop me from looking around and finding some potentially useful app notes:

A.C. Coupling Capacitor Selection

Recommended Output Filters for Wolfson Audio DACs 

Class D Headphone Filter Component Selection

Issues When Grounding D.C. Coupled Headphone Outputs

The main reason that I was looking there in the first place was that I was getting excessive noise when coupling a portable audio player to an audio system I am working on and couldn’t figure out why. When I took everything apart, I found that output stage of the audio device was being pulled up to a higher voltage than expected by the coupling on the input stage and thereby biasing the input stage of the audio amplifier incorrectly. After some careful circuit modifications, the signal integrity was returned with fairly good low frequency response. At this point, my audio circuit experience is still minimal, I hope to post some designs once I get something worthwhile going.

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The basic idea with this design is that a three electrode system is used, two electrodes for the ECG and one for grounding the person being recorded from. The common mode signal from the two recording electrodes is inverted and used to drive the ground electrode with the hope of trying to mitigate the corrupting common mode signal. This grounding is typically applied far from the recording site of interest, often the right leg.

For the design, I constructed three copper coated electrodes from U.S.A. pennies and coated them with conductive paste borrowed from the electroencephalogram area. The two recording electrodes were positioned over the left portion of the chest and the right side of the torso and fed into the inputs of an INA116 (three 0p-amp instrumentation amplifier). To get the common mode signal, I split the gain resistor of the INA116 (Rg) into two equal resistors and fed the center tap voltage into a buffer. The output of that was then fed into an inverting amplifier and connected to the third reference electrode. The optimal gain of this electrode is yet to be determined, but with a few experiments, I was able to get a pretty clean signal. The final step in the equation is to do some band-pass filtering. I am thinking of doing something along the lines of 0.5 to 30Hz.

The preliminary data is shown both on the scope and verified with an optical pulse-oxymetry unit. The shape of the ECG can be distorted due to improper electrode placement and the resting heart rate is a little high for my norm, possibly due to excessive straining to get the pictures without shaking the camera. On a final note, the safety of this system is yet to be fully evaluated. The power supply is grounded to mains ground and the drive voltage of the driven reference electrode cannot exceed 5V. I am thinking of adding a series resistor and some Zener diodes to make it more safe, but that will be included in the final design. I plan to play around with this idea for a week or two and then post full schematics and possibly a data set of my own ECG when it becomes available. As always, comments are very welcome.

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Final exams are over, so I am back to designing things. The first thing that I worked on was this tester for my pre-amplifier set. The pre-amplifiers are differential inputs into INA116 instrumentation amplifiers. I am trying to model very fine electrodes as the source, so I use a high (>100kΩ ) source with a 250μVpp (with a 300mV offset) test signal. What I didn’t take into account was sub-threshold conduction in the LEDs on the board. The minute current added to very high resistance networks created relatively large offsets in the test circuit and made it unusable. Most LED datasheets don’t display the current profiles below 0.1mA and many diode datasheets don’t display them past the μA range. Moral of the story is save yourself a few hours of debugging and remember that diodes conduct even below threshold.

( ina116.pdf ) ( dan235e.pdf ) ( 1n4004.pdf )

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Since I am taking a CMOS linear integrated circuit design course, I thought it would be reasonable to try to find a few designs of practical operational amplifiers that have been commercially used. Everyone knows the LM741 BJT op amp, but I found it to be difficult to find some complete CMOS designs, even for obsolete parts. I emailed many linear device vendors (TI, Analog Devices, National Semiconductor, On Semiconductor), introduced myself as a student, and then inquired if they had some complete CMOS design that were available to the public. Unfortunately, most of the support people either responded that all of their designs were proprietary information and was not for public viewing, or they sent me a 741 BJT schematic and then said all of their CMOS designs were private. Undeterred from my mission to study complete CMOS op-amps, I went to Google Patent Search. And found designs and explanations straight from the various manufacturers. Since patent information is publicly available, why not provide this information from the start?

( cmos-op-amp-ti.pdf )

( cmos-op-amp-national.pdf )

( cmos-op-amp-mot.pdf )

( cmos-op-amp-analog.pdf )

( cmos-op-amp-ami.pdf )

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I am coming to the realization that the PLL is one of the most under-appreciated components used in almost all aspects of electrical engineering. In many PLL applications, such as clock generation, the ratio of the output frequency to driving frequency is below ten, but a well designed PLL can push this ratio to several orders of magnitude. Finally, very special regard must be held for designers of very low frequency PLLs since keeping track of things for tens of milliseconds or more is very difficult in the analog domain. This is not to discredit designers of very fast (>500MHz) PLLs where the high frequencies tend to bring out non-ideal effects. First, here is a guide from Freescale Semi. that outlines the design of PLLs through a control theory approach based in the s-domain. Next, here is an application note written by Bob Pease in 1979 that describes some non-standard uses for PLLs as well as low (~1-10kHz) frequency design. Finally, here is report from MOSIS outlining a physical implementation of a given PLL design. (MOSIS tends to publish the projects that it funds internally for universities.)

( an535.pdf ) ( an-210.pdf ) ( digital_pll_report_1.pdf )

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Bob Pease is regarded as Mr. Analog by many people and he continues to explain misunderstood phenomena in a wide range of applications.  The first edition of this note on capacitor soakage was published in 1982 in EDN, the year that I was born, and is still one of the few decent articles I can find covering the subject. This should prove useful to designers of sample-and-hold and integrator circuits along with those who are interested in a deeper knowledge of capacitors.

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About four years ago, when I first started using the Orcad suite, I embarked on an ambitious project to design one of my first EEG recording amplifier and stimulator interface boards. The project was pretty simple: route twelve differential channels from the pre-amp to the EEG amplifier, track the current going out of the stimulator by way of sense resistors and interface with a National Instruments acquisition board. I did the schematic entry correctly, but I neglected to double check the footprints used for the connectors. That is, in the schematic entry, I used a generic 68 pin connector for the NI connector and selected metal can regulators instead of TO-220 and then picked the wrong polarity on all of the d-sub connectors. The result was that the 68 pin connector just didn’t fit and required massive jumpering for even basic functionality, some of the db25 connectors had to go to the back  of the board (not shown) and the power regulators had to be kludged on. The board was not becoming a truly three-dimensional object that had wires coming out from every direction and could only be secured by clamping one edge of it in a vice. Otherwise, it functioned fairly well so it was still used in some experiments. Due to its green color and protruding wires, it became known as the “christmas tree” and be came synonymous with design failure.

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Single BiFET op-amp from Analog Devices. Looks to be pretty planar when I scanned the Z axis with the confocal on. (datasheet)

ad711-10x.jpg

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What better way to apply the uncapping techniques than to put some of the dies under the scope. This is the die from the can-package AMP03 (datasheet). Unfortunately, the only top illumination system we have in the lab is for fluorescence, so the color that showed up the best was green, hence the tint. Below is a higher resolution montage of the die’s top layer taken at 10x along with a single shot at 20x. Since I am still learning to use the scope, the quality of the dies should increase with the following weeks. Finally, if anyone has some chips they want to see up here, leave a comment or send an email and we might be able to work something out.

( amp03.pdf )

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When dealing with two op-amp instrumentation amplifiers that have a small footprint, we are often faced with a non-unity minimal gain value. The minimum gain is 5 for the ina2332 for example. The reasoning behind this can be found in chapter two of the Analog Devices’ Op Amp Application Handbook. (Not to be confused with Texas Instrument’s Handbook of Operational Amplifier Applications.) By increasing the gain we increase the allowable common mode input range as well as improving the amplifier frequency response. Everything has its limits, so be mindful that the CMRR of the two op-amp instrumentation amplifier suffers at high frequency due to slight phase shift between the signal that goes through the first amp and the signal coming into the second amp.

( sboa092a.pdf ) ( Op_Amp_Applications.zip )

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