Category Archives: Amplifier

Audio application notes


Although Wolfson Microelectronics produces some fine integrated circuits, their application note section is somewhat out of the way and doesn’t like to be linked to directly. This didn’t stop me from looking around and finding some potentially useful app notes:

A.C. Coupling Capacitor Selection

Recommended Output Filters for Wolfson Audio DACs 

Class D Headphone Filter Component Selection

Issues When Grounding D.C. Coupled Headphone Outputs

The main reason that I was looking there in the first place was that I was getting excessive noise when coupling a portable audio player to an audio system I am working on and couldn’t figure out why. When I took everything apart, I found that output stage of the audio device was being pulled up to a higher voltage than expected by the coupling on the input stage and thereby biasing the input stage of the audio amplifier incorrectly. After some careful circuit modifications, the signal integrity was returned with fairly good low frequency response. At this point, my audio circuit experience is still minimal, I hope to post some designs once I get something worthwhile going.

CMOS operational amplifier designs


Since I am taking a CMOS linear integrated circuit design course, I thought it would be reasonable to try to find a few designs of practical operational amplifiers that have been commercially used. Everyone knows the LM741 BJT op amp, but I found it to be difficult to find some complete CMOS designs, even for obsolete parts. I emailed many linear device vendors (TI, Analog Devices, National Semiconductor, On Semiconductor), introduced myself as a student, and then inquired if they had some complete CMOS design that were available to the public. Unfortunately, most of the support people either responded that all of their designs were proprietary information and was not for public viewing, or they sent me a 741 BJT schematic and then said all of their CMOS designs were private. Undeterred from my mission to study complete CMOS op-amps, I went to Google Patent Search. And found designs and explanations straight from the various manufacturers. Since patent information is publicly available, why not provide this information from the start?

( cmos-op-amp-ti.pdf )

( cmos-op-amp-national.pdf )

( cmos-op-amp-mot.pdf )

( cmos-op-amp-analog.pdf )

( cmos-op-amp-ami.pdf )

National Semi. app. note on capacitor soakage


Bob Pease is regarded as Mr. Analog by many people and he continues to explain misunderstood phenomena in a wide range of applications.  The first edition of this note on capacitor soakage was published in 1982 in EDN, the year that I was born, and is still one of the few decent articles I can find covering the subject. This should prove useful to designers of sample-and-hold and integrator circuits along with those who are interested in a deeper knowledge of capacitors.

Some important aspects of PCB layout


About four years ago, when I first started using the Orcad suite, I embarked on an ambitious project to design one of my first EEG recording amplifier and stimulator interface boards. The project was pretty simple: route twelve differential channels from the pre-amp to the EEG amplifier, track the current going out of the stimulator by way of sense resistors and interface with a National Instruments acquisition board. I did the schematic entry correctly, but I neglected to double check the footprints used for the connectors. That is, in the schematic entry, I used a generic 68 pin connector for the NI connector and selected metal can regulators instead of TO-220 and then picked the wrong polarity on all of the d-sub connectors. The result was that the 68 pin connector just didn’t fit and required massive jumpering for even basic functionality, some of the db25 connectors had to go to the back  of the board (not shown) and the power regulators had to be kludged on. The board was not becoming a truly three-dimensional object that had wires coming out from every direction and could only be secured by clamping one edge of it in a vice. Otherwise, it functioned fairly well so it was still used in some experiments. Due to its green color and protruding wires, it became known as the “christmas tree” and be came synonymous with design failure.

christmas-tree01.jpg christmas-tree02.jpg

IC Friday: Analog Device’s AMP03


What better way to apply the uncapping techniques than to put some of the dies under the scope. This is the die from the can-package AMP03 (datasheet). Unfortunately, the only top illumination system we have in the lab is for fluorescence, so the color that showed up the best was green, hence the tint. Below is a higher resolution montage of the die’s top layer taken at 10x along with a single shot at 20x. Since I am still learning to use the scope, the quality of the dies should increase with the following weeks. Finally, if anyone has some chips they want to see up here, leave a comment or send an email and we might be able to work something out.

mbf.jpeg amp03-20x.jpg ad-amp03-tn.JPG ( amp03.pdf )

Gain setting in instrumentation amplifiers

When dealing with two op-amp instrumentation amplifiers that have a small footprint, we are often faced with a non-unity minimal gain value. The minimum gain is 5 for the ina2332 for example. The reasoning behind this can be found in chapter two of the Analog Devices’ Op Amp Application Handbook. (Not to be confused with Texas Instrument’s Handbook of Operational Amplifier Applications.) By increasing the gain we increase the allowable common mode input range as well as improving the amplifier frequency response. Everything has its limits, so be mindful that the CMRR of the two op-amp instrumentation amplifier suffers at high frequency due to slight phase shift between the signal that goes through the first amp and the signal coming into the second amp.

( sboa092a.pdf ) ( )

A simple, three electrode potentiostat design


In a follow up to my previous potentiostat post, here is the three-electrode model. In situations where the electrolyte is sparse, the uncompensated solution resistance between the working electrode (WE) and counter electrode (CE) can unintentionally reduce the amount of current seen. For these situations, a third electrode called the reference electrode is introduced. The idea here is that you supply a potential on Vin and the potentiostat sets the working electrode potential to whatever it needs to be so that the potential difference between the working and reference electrode is equal to Vin. At the same time, the counter electrode is held at ground via current follower to track the required current to keep the working electrode at the desired potential. Below is a simple cyclic voltammagram of a iridium-oxide working electrode with a silver/silver-chloride reference and counter electrodes. The electrolytes are phosphate-buffered saline and saline. The scan waveform is triangular going from +0.6V to -0.6V with scan rate of 50mV/s. You may notice some strange lines crossing the plots, these are sampling artifacts. On a circuit design note, U1 and the peripheral resistor network can be replaced with an Analog Devices AMP03 so that there are less external components and the resistors are matched.

Two types of simple potentiostat circuits


If you want to design a simple circuit where you program the voltage between two electrodes, the Working Electrode and the Counter Electrode, two solutions come to mind: a current follower (Fig 2) and using a sense resistor (Fig 3). The easier solution seems to be the current follower as you only need two op-amps. The idea here is that you buffer the input voltage to the WE side of the electrode-electrolyte-electrode cell and then keep the CE side at ground potential and track the current required to do so across Rf. If you combine figures 1 and 2 and assume that the WE is just an input voltage, you can see that the circuit is a high pass filter. As the frequency goes up, Cd (the electrode double layer capacitance) will have a lower and lower impedance and will result in a circuit whose gain is Rf/Ru (the uncompensated solution resistance). At the same time, as the frequency goes up, the output impedance of the op-amp also goes up effectively increasing Rf. Since the sweep rate used in cyclic voltammetry is slow, usually triangular wave at 50mV/s sweep, any high frequency noise sources can easily have higher gain than the signal we are looking for and give us poor recordings. Depending on the situation, this can lead to resonance which can totally corrupt the data.

On the other hand, the circuit in figure 3 can be used to avoid this problem. Since both WE and CE are driven with voltage followers, the feedback path for CE is low impedance and will be lower than Ru for reasonable frequencies giving us a stable system. The downside is that the applied potential is actually reduced due to the voltage drop across Rsense. We can calculate the applied potential by subtracting the measured potential across Rsense and be done with it, but this will not guarantee that our sweep rate is actually 50mV/s. This can become important when dealing with electrochemistry in sparse solutions or a medium with low ionic permeability. A solution to this problem would be to introduce a feedback system to vary WE or CE inputs according to the potential drop across Rsense, but that would just bring us back to the same feedback problem in the above paragraph.

Given our desire to only do cyclic voltammagrams in this situation, a good solution is to introduce a feedback capacitor in parallel with the feedback resistor in figure 2 to give the overall transfer function a low-pass shape. The justification for this is that if we scan, for example, from -0.6V to +0.6V (a reasonable value for iridium-oxide electrode v.s. silver/silver-chloride) at 50mV/s, we get a very low frequency of about 0.022Hz. The first harmonic past the base frequency is already 20dB below the base frequency power, so we can use the 22mHz to determine the impedance of our Cf and make sure it is high enough so that it doesn’t affect the effective Rf. I ended up using an Rf of 4.7KOhm and Cf of 100nF. Given these values and schematics, I was able to design a very simple potentiostat that had modest noise values and adequate performance for the job.

More LabView horror: amp-control4


This is the implementation that follows my earlier post about hardware digital I/O timing with LabView. I implemented the control VI for my EEG amplifier. Previous versions used on-demand timing, which may have caused some problems when we tried to set the gain and offset on machines that were under load from other processes. This VI exploits the 100kHz timebase (on M-series boards at least) and uses it to clock out a well-timed waveform regardless of the system load. The chips that I use to set the channel gains and offsets are Intersil X9250TS24 digital potentiometers, so the generate-bitstream VI creates the structure to be written to the digital port based on three-byte command sequences which in turn are based on the serial protocol. The main VI provides the user interface and writes that bitstream and log file. )