Monthly Archives: December 2006

How to properly merge and panelize designs in GerbTool within the Allegro suite


To make prototyping of small PCBs more cost effective, thumb it is helpful to merge several designs into one and then to panelize it so that there are multiple copies on the same board. After creating the two separate boards in Cadence Layout and then running the post processing, stuff to create Gerber files and NC drill files, we open the created GDT file in GerbTool (Layout->Tools->GerbTool->Open). For each of the designs, we first allow GerbTool to update the design file version to the most current one and then we delete all of the unused layer files from the database. Next, we import the NC drill file by doing File->Import->NC (Drill/Mill). After picking throughole.tap, it is necessary to select the proper scaling. To learn more about this, go to Help->Help Topics and search for “decimal”, then select File|Import|NC (Drill/Mill). The problem is that NC files don’t contain decimal points so the software has to guess. To test this, when importing the NC Drill file, play with the m.n setting and click apply. When the board size above the preview is about the size of your board, click OK and verify that the drill holes overlap the proper locations in the other layers. Finally, save the design and do the same for all other designs to be imported. When you are ready to merge, simply open one design then merge the other designs into it using File->Merge. You can use the panelize tool to create multiple copies depending on your configuration. Be sure that all of the necessary layers are visible prior to panelizing as only the visible layers will be acted upon. Next, create the board outline in the silkscreen layer by right clicking it in the navigator and selecting it as active and then simply draw the rectangle around all of the artwork. Save the design here and export the NC Drill file as well as the Gerber files. These files will now be ready to be sent off to the PCB manufacturing house.

A simple, three electrode potentiostat design


In a follow up to my previous potentiostat post, oncologist
here is the three-electrode model. In situations where the electrolyte is sparse, the uncompensated solution resistance between the working electrode (WE) and counter electrode (CE) can unintentionally reduce the amount of current seen. For these situations, a third electrode called the reference electrode is introduced. The idea here is that you supply a potential on Vin and the potentiostat sets the working electrode potential to whatever it needs to be so that the potential difference between the working and reference electrode is equal to Vin. At the same time, the counter electrode is held at ground via current follower to track the required current to keep the working electrode at the desired potential. Below is a simple cyclic voltammagram of a iridium-oxide working electrode with a silver/silver-chloride reference and counter electrodes. The electrolytes are phosphate-buffered saline and saline. The scan waveform is triangular going from +0.6V to -0.6V with scan rate of 50mV/s. You may notice some strange lines crossing the plots, these are sampling artifacts. On a circuit design note, U1 and the peripheral resistor network can be replaced with an Analog Devices AMP03 so that there are less external components and the resistors are matched.

Two types of simple potentiostat circuits


If you want to design a simple circuit where you program the voltage between two electrodes, viagra the Working Electrode and the Counter Electrode, cialis sale two solutions come to mind: a current follower (Fig 2) and using a sense resistor (Fig 3). The easier solution seems to be the current follower as you only need two op-amps. The idea here is that you buffer the input voltage to the WE side of the electrode-electrolyte-electrode cell and then keep the CE side at ground potential and track the current required to do so across Rf. If you combine figures 1 and 2 and assume that the WE is just an input voltage, illness you can see that the circuit is a high pass filter. As the frequency goes up, Cd (the electrode double layer capacitance) will have a lower and lower impedance and will result in a circuit whose gain is Rf/Ru (the uncompensated solution resistance). At the same time, as the frequency goes up, the output impedance of the op-amp also goes up effectively increasing Rf. Since the sweep rate used in cyclic voltammetry is slow, usually triangular wave at 50mV/s sweep, any high frequency noise sources can easily have higher gain than the signal we are looking for and give us poor recordings. Depending on the situation, this can lead to resonance which can totally corrupt the data.

On the other hand, the circuit in figure 3 can be used to avoid this problem. Since both WE and CE are driven with voltage followers, the feedback path for CE is low impedance and will be lower than Ru for reasonable frequencies giving us a stable system. The downside is that the applied potential is actually reduced due to the voltage drop across Rsense. We can calculate the applied potential by subtracting the measured potential across Rsense and be done with it, but this will not guarantee that our sweep rate is actually 50mV/s. This can become important when dealing with electrochemistry in sparse solutions or a medium with low ionic permeability. A solution to this problem would be to introduce a feedback system to vary WE or CE inputs according to the potential drop across Rsense, but that would just bring us back to the same feedback problem in the above paragraph.

Given our desire to only do cyclic voltammagrams in this situation, a good solution is to introduce a feedback capacitor in parallel with the feedback resistor in figure 2 to give the overall transfer function a low-pass shape. The justification for this is that if we scan, for example, from -0.6V to +0.6V (a reasonable value for iridium-oxide electrode v.s. silver/silver-chloride) at 50mV/s, we get a very low frequency of about 0.022Hz. The first harmonic past the base frequency is already 20dB below the base frequency power, so we can use the 22mHz to determine the impedance of our Cf and make sure it is high enough so that it doesn’t affect the effective Rf. I ended up using an Rf of 4.7KOhm and Cf of 100nF. Given these values and schematics, I was able to design a very simple potentiostat that had modest noise values and adequate performance for the job.

V3C Razr USB driver


In case you have the misfortune of using a Motorola V3C Razr and forget your charger, ampoule
you need drivers to charge the phone from a standard USB port. This is because the phone needs to authenticate the charger prior to use. If you have a windows system, the drivers are available here. Not sure about other platforms. )

Novel (maybe?) alarm clock design idea


I have found that I have lately developed the ability to turn off my alarm clock while remaining asleep. I am guessing that I am not the only one. The idea is designing an alarm clock that has four seven segment displays for two hour and two minute digits. A LED that blinks every second between the minutes and hours and an LED indicating AM/PM if you don’t like twenty four hour time. Above each of the seven segment displays and LEDs is a functional button, cost to set time or set alarm. Once the alarm goes off, a button press suspends the alarm for a short period of time allowing the user to disarm the system. At each alarm, the microcontroller determines a random sequence of five or six buttons of a pre-determined length. The microcontroller notifies the user which button to press by blinking the seven segment display or LED that is below the button. Once the user has pressed the correct button, it issues the next command. Once enough commands have been entered, say ten, the alarm would be fully disarmed. This procedure would have to be carried out any time the alarm is to be turned off, even before its scheduled time. I’m thinking of implementing this using some kind of 8-bit MCU and a serial real-time clock with a little NVRAM to store the alarm time and encasing it in a rugged enclosure in case it gets thrown.

What do you think?