While Intel is moving to a 45nm feature (channel) size in 2007 and scientists are working on making devices even smaller, symptoms
one may naively think that with shorter distances, discount we can have higher switching speeds and run the chips at 100GHz to meet the processing requirements for the “full” edition of Vista. The idea is constant field shrinking: we reduce critical device measurements in such a way as to maintain the same electric fields within the device. What this means, if half the channel length, width, and oxide thickness, we must also half the gate operating voltage and double the impurity doping concentration. We double the current density, but power density stays the same since we halved the operating gate voltage. This seems like a good deal: we reduce the device cross section area to 1/4th of the original size, increase switching speed (theoretically due to shorter path traveled by carriers) and maintain the same power density. So what’s the downside?
Unfortunately, nature really makes us work hard for the good things, so being able to use these smaller devices comes with a cost. First and foremost, you have leakage. There is the leakage component that comes from carrier tunneling through energy barriers and the component from the parasitic capacitances at higher frequencies. And we must keep in mind that there leakage from one device affects the neighboring devices, it doesn’t simply vanish. Furthermore, as the logic levels increase, we need some way to make them compatible with peripheral devices. We can either make all of our logic run at a lower level and incur the associated costs, or add extra level shifting logic, which might impede performance so that it is better to avoid the smaller devices in the first place. Don’t forget that as device size shrinks, their fabrication becomes more of a statistical process, the device to device parameters will have more fluctuation as compared with large devices. Furthermore, it is difficult to make doping profiles vary sharply enough to meet the constant field criteria since the dopants diffuse after injection. This is not to say that there is no hope, many of today’s semiconductor manufacturers are maintaining quasi-constant fields while shrinking their devices. That is to say that they shrink the device dimensions, but perhaps keep the logic levels the same at the expense of developing a gate oxide replacement with better permittivity and using silicon-on-insulator processes. So bottom line is that it is possible, but very difficult, so keep this in mind next time someone tells you about the shortly forthcoming 100GHz chips.