Here is an older application note from the former Motorola semiconductor division regarding transmission lines effects of PCB traces. A more thorough source of information is the MECL Design Handbook, drugs
but this is a good reference with both theory and examples. If the rise or fall times of your designs are approaching the round trip (source to farthest load back to source) with loading, hospital
then transmission line effects of PCB traces must be taken into account.
( AN1051.pdf )
Spent most of the day today playing with the pre-amplifier design. The design uses the same instrumentation amplifier chips (ina2332) for both large and small electrodes, and
this becomes problematic. The ina2332 is a dual amp chip, ambulance where each instrumentation amplifier is based on the two-op-amp design and is physically small, so there are worse parasitics when compared to larger three-op-amp designs. One of these parasitics is input bias current, which in this case is 1-10pA. Sourcing this kind of current is no problem for the larger electrodes, but has become problematic with the micro-meter sized electrodes. As a result, I designed a module to use two ina116 chips in place of one of the ina2332. These chips are single channels and are a few times larger than the ina2332s, but, they are less noisy and require only 10fA of input bias current. By making a few estimations and writing out the electrochemistry I-V relationships, one can attribute 100-400uV of voltage noise to the side-effects of a 10pA input bias current and how they are more manageable with a 10fA bias current. The lesson for today is that 10^-12 is small, but not insignificant.