Here is an older application note from the former Motorola semiconductor division regarding transmission lines effects of PCB traces. A more thorough source of information is the MECL Design Handbook, but this is a good reference with both theory and examples. If the rise or fall times of your designs are approaching the round trip (source to farthest load back to source) with loading, then transmission line effects of PCB traces must be taken into account.

( AN1051.pdf )

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